Difference between revisions of "Abbreviations:MIPS"
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(Created page with "In the world of microprocessors, MIPS and ARM do a great service on behalf of their instruction set architectures. MIPS is implemented primarily in embedded systems.") |
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| − | + | MIPS is an acronym for Microprocessor without Interlocked Pipeline Stages and is a reduced instruction set computer (RISC) instruction set architecture (ISA.)The early MIPS architectures were 32-bit, with 64-bit versions added later. MIPS is implemented primarily in embedded systems. | |
Latest revision as of 06:47, 15 February 2018
MIPS is an acronym for Microprocessor without Interlocked Pipeline Stages and is a reduced instruction set computer (RISC) instruction set architecture (ISA.)The early MIPS architectures were 32-bit, with 64-bit versions added later. MIPS is implemented primarily in embedded systems.
